Green Mountain VHDL vs. IEEE VHDL

This chapter describes the known differences between Green Mountain VHDL and the IEEE Std 1076-1987 VHDL specification. GM VHDL vs. IEEE standard:

The configuration declaration construct is not supported. This construct is used to defer binding entities to component instantiations.
Aggregate choice ranges must be constant values. There is no related restriction in the standard.
There is no run-time range checking on scalar type objects. In the standard, it is an error if, during execution, a scalar object takes a value out of its subtype range.
Case statements do not need to be exhaustive, provided the unspecified cases do not occur during execution. The standard requires that every case be specified.
With the exception of vectors, a subelement of a composite type can not be a resolved subtype. There is no related restriction in the standard.
Signals may not be declared in packages. There is no related restriction in the standard.
Ports of the top-level entity must not be of a resolved type.
A signal of a vector type with a resolved element type, can not be indexed in a port actual.
Resolved port acutals can only be associated with formals of the same resolved type.